atomic.h

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00001 /*
00002  * Copyright (c) 2007 Michal Kebrt
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  *
00009  * - Redistributions of source code must retain the above copyright
00010  *   notice, this list of conditions and the following disclaimer.
00011  * - Redistributions in binary form must reproduce the above copyright
00012  *   notice, this list of conditions and the following disclaimer in the
00013  *   documentation and/or other materials provided with the distribution.
00014  * - The name of the author may not be used to endorse or promote products
00015  *   derived from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
00018  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
00019  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
00020  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
00021  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
00022  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
00023  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
00024  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00025  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
00026  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00027  */
00028 
00036 #ifndef LIBC_arm32_ATOMIC_H_
00037 #define LIBC_arm32_ATOMIC_H_
00038 
00039 #define LIBC_ARCH_ATOMIC_H_
00040 #define CAS
00041 
00042 #include <atomicdflt.h>
00043 #include <bool.h>
00044 #include <sys/types.h>
00045 
00046 extern uintptr_t *ras_page;
00047 
00048 static inline bool cas(atomic_t *val, atomic_count_t ov, atomic_count_t nv)
00049 {
00050         atomic_count_t ret = 0;
00051         
00052         /*
00053          * The following instructions between labels 1 and 2 constitute a
00054          * Restartable Atomic Seqeunce. Should the sequence be non-atomic,
00055          * the kernel will restart it.
00056          */
00057         asm volatile (
00058                 "1:\n"
00059                 "       adr %[ret], 1b\n"
00060                 "       str %[ret], %[rp0]\n"
00061                 "       adr %[ret], 2f\n"
00062                 "       str %[ret], %[rp1]\n"
00063                 "       ldr %[ret], %[addr]\n"
00064                 "       cmp %[ret], %[ov]\n"
00065                 "       streq %[nv], %[addr]\n"
00066                 "2:\n"
00067                 "       moveq %[ret], #1\n"
00068                 "       movne %[ret], #0\n"
00069                 : [ret] "+&r" (ret),
00070                   [rp0] "=m" (ras_page[0]),
00071                   [rp1] "=m" (ras_page[1]),
00072                   [addr] "+m" (val->count)
00073                 : [ov] "r" (ov),
00074                   [nv] "r" (nv)
00075                 : "memory"
00076         );
00077         
00078         ras_page[0] = 0;
00079         asm volatile (
00080                 "" ::: "memory"
00081         );
00082         ras_page[1] = 0xffffffff;
00083         
00084         return (bool) ret;
00085 }
00086 
00095 static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i)
00096 {
00097         atomic_count_t ret = 0;
00098         
00099         /*
00100          * The following instructions between labels 1 and 2 constitute a
00101          * Restartable Atomic Seqeunce. Should the sequence be non-atomic,
00102          * the kernel will restart it.
00103          */
00104         asm volatile (
00105                 "1:\n"
00106                 "       adr %[ret], 1b\n"
00107                 "       str %[ret], %[rp0]\n"
00108                 "       adr %[ret], 2f\n"
00109                 "       str %[ret], %[rp1]\n"
00110                 "       ldr %[ret], %[addr]\n"
00111                 "       add %[ret], %[ret], %[imm]\n"
00112                 "       str %[ret], %[addr]\n"
00113                 "2:\n"
00114                 : [ret] "+&r" (ret),
00115                   [rp0] "=m" (ras_page[0]),
00116                   [rp1] "=m" (ras_page[1]),
00117                   [addr] "+m" (val->count)
00118                 : [imm] "r" (i)
00119         );
00120         
00121         ras_page[0] = 0;
00122         asm volatile (
00123                 "" ::: "memory"
00124         );
00125         ras_page[1] = 0xffffffff;
00126         
00127         return ret;
00128 }
00129 
00130 
00136 static inline void atomic_inc(atomic_t *val)
00137 {
00138         atomic_add(val, 1);
00139 }
00140 
00141 
00147 static inline void atomic_dec(atomic_t *val)
00148 {
00149         atomic_add(val, -1);
00150 }
00151 
00152 
00159 static inline atomic_count_t atomic_preinc(atomic_t *val)
00160 {
00161         return atomic_add(val, 1);
00162 }
00163 
00164 
00171 static inline atomic_count_t atomic_predec(atomic_t *val)
00172 {
00173         return atomic_add(val, -1);
00174 }
00175 
00176 
00183 static inline atomic_count_t atomic_postinc(atomic_t *val)
00184 {
00185         return atomic_add(val, 1) - 1;
00186 }
00187 
00188 
00195 static inline atomic_count_t atomic_postdec(atomic_t *val)
00196 {
00197         return atomic_add(val, -1) + 1;
00198 }
00199 
00200 
00201 #endif
00202 

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