00001 /* 00002 * Copyright (c) 2007 Pavel Jancik 00003 * All rights reserved. 00004 * 00005 * Redistribution and use in source and binary forms, with or without 00006 * modification, are permitted provided that the following conditions 00007 * are met: 00008 * 00009 * - Redistributions of source code must retain the above copyright 00010 * notice, this list of conditions and the following disclaimer. 00011 * - Redistributions in binary form must reproduce the above copyright 00012 * notice, this list of conditions and the following disclaimer in the 00013 * documentation and/or other materials provided with the distribution. 00014 * - The name of the author may not be used to endorse or promote products 00015 * derived from this software without specific prior written permission. 00016 * 00017 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 00018 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 00019 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 00020 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 00021 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 00022 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 00023 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 00024 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00025 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 00026 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00027 */ 00028 00036 #include <libc.h> 00037 00038 00052 sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3, 00053 const sysarg_t p4, const sysarg_t p5, const sysarg_t p6, const syscall_t id) 00054 { 00055 register sysarg_t __arm_reg_r0 asm("r0") = p1; 00056 register sysarg_t __arm_reg_r1 asm("r1") = p2; 00057 register sysarg_t __arm_reg_r2 asm("r2") = p3; 00058 register sysarg_t __arm_reg_r3 asm("r3") = p4; 00059 register sysarg_t __arm_reg_r4 asm("r4") = p5; 00060 register sysarg_t __arm_reg_r5 asm("r5") = p6; 00061 register sysarg_t __arm_reg_r6 asm("r6") = id; 00062 00063 asm volatile ( 00064 "swi 0" 00065 : "=r" (__arm_reg_r0) 00066 : "r" (__arm_reg_r0), 00067 "r" (__arm_reg_r1), 00068 "r" (__arm_reg_r2), 00069 "r" (__arm_reg_r3), 00070 "r" (__arm_reg_r4), 00071 "r" (__arm_reg_r5), 00072 "r" (__arm_reg_r6) 00073 ); 00074 00075 return __arm_reg_r0; 00076 } 00077