|
Files |
| file | pci.c |
| file | pci.h |
| file | pci_regs.h |
Data Structures |
| struct | pci_fun_data |
| struct | pciintel_bus |
Defines |
|
#define | CONF_ADDR(bus, dev, fn, reg) ((1 << 31) | (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3)) |
|
#define | NAME "pciintel" |
|
#define | PCI_BASE_ADDR_0 0x10 |
|
#define | PCI_BASE_ADDR_1 0x14 |
|
#define | PCI_BASE_ADDR_2 0x18 |
|
#define | PCI_BASE_ADDR_3 0x1B |
|
#define | PCI_BASE_ADDR_4 0x20 |
|
#define | PCI_BASE_ADDR_5 0x24 |
|
#define | PCI_BASE_CLASS 0x0B |
|
#define | PCI_BIST 0x0F |
|
#define | PCI_BRIDGE_CTL 0x3E |
|
#define | PCI_BRIDGE_EXP_ROM_BASE 0x38 |
|
#define | PCI_BRIDGE_INT_LINE 0x3C |
|
#define | PCI_BRIDGE_INT_PIN 0x3D |
|
#define | PCI_BRIDGE_IO_BASE 0x1C |
|
#define | PCI_BRIDGE_IO_BASE_UP 0x30 |
|
#define | PCI_BRIDGE_IO_LIMIT 0x1D |
|
#define | PCI_BRIDGE_IO_LIMIT_UP 0x32 |
|
#define | PCI_BRIDGE_MEMORY_BASE 0x20 |
|
#define | PCI_BRIDGE_MEMORY_LIMIT 0x22 |
|
#define | PCI_BRIDGE_PREF_MEMORY_BASE 0x24 |
|
#define | PCI_BRIDGE_PREF_MEMORY_BASE_UP 0x28 |
|
#define | PCI_BRIDGE_PREF_MEMORY_LIMIT 0x26 |
|
#define | PCI_BRIDGE_PREF_MEMORY_LIMIT_UP 0x2C |
|
#define | PCI_BRIDGE_PRIM_BUS_NUM 0x18 |
|
#define | PCI_BRIDGE_SEC_BUS_NUM 0x19 |
|
#define | PCI_BRIDGE_SEC_LATENCY_TIMER 0x1B |
|
#define | PCI_BRIDGE_SEC_STATUS 0x1E |
|
#define | PCI_BRIDGE_SUBORD_BUS_NUM 0x1A |
|
#define | PCI_BUS(dnode) ((pci_bus_t *) (dnode)->driver_data) |
| | Obtain PCI bus soft-state from DDF device node.
|
|
#define | PCI_BUS_FROM_FUN(fun) ((fun)->busptr) |
| | Obtain PCI bus soft-state from function soft-state.
|
|
#define | PCI_CACHE_LINE_SIZE 0x0C |
|
#define | PCI_CAP_PTR 0x34 |
|
#define | PCI_CARDBUS_CIS_PTR 0x28 |
|
#define | PCI_COMMAND 0x04 |
|
#define | PCI_DEVICE_ID 0x02 |
|
#define | PCI_EXP_ROM_BASE 0x30 |
|
#define | PCI_FUN(fnode) ((pci_fun_t *) (fnode)->driver_data) |
| | Obtain PCI function soft-state from DDF function node.
|
|
#define | PCI_HEADER_TYPE 0x0E |
|
#define | PCI_HEADER_TYPE_BRIDGE 1 |
|
#define | PCI_HEADER_TYPE_CARDBUS 2 |
|
#define | PCI_HEADER_TYPE_DEV 0 |
|
#define | PCI_INT_LINE 0x3C |
|
#define | PCI_INT_PIN 0x3D |
|
#define | PCI_LATENCY_TIMER 0x0D |
|
#define | PCI_MAX_HW_RES 8 |
|
#define | PCI_MAX_LAT 0x3F |
|
#define | PCI_MIN_GNT 0x3E |
|
#define | PCI_PROG_IF 0x09 |
|
#define | PCI_REVISION_ID 0x08 |
|
#define | PCI_STATUS 0x06 |
|
#define | PCI_SUB_CLASS 0x0A |
|
#define | PCI_SUBSYSTEM_ID 0x2E |
|
#define | PCI_SUBSYSTEM_VENDOR_ID 0x2C |
|
#define | PCI_VENDOR_ID 0x00 |
Functions |
| int | main (int argc, char *argv[]) |
| | Main entry point.
|
|
static int | pci_add_device (ddf_dev_t *) |
|
void | pci_add_interrupt (pci_fun_t *fun, int irq) |
|
void | pci_add_range (pci_fun_t *fun, uint64_t range_addr, size_t range_size, bool io) |
|
bool | pci_alloc_resource_list (pci_fun_t *fun) |
|
size_t | pci_bar_mask_to_size (uint32_t mask) |
|
static void | pci_bus_delete (pci_bus_t *bus) |
|
static pci_bus_t * | pci_bus_new (void) |
| void | pci_bus_scan (pci_bus_t *bus, int bus_num) |
| | Enumerate (recursively) and register the devices connected to a pci bus.
|
|
void | pci_clean_resource_list (pci_fun_t *fun) |
|
static void | pci_conf_read (pci_fun_t *fun, int reg, uint8_t *buf, size_t len) |
|
uint16_t | pci_conf_read_16 (pci_fun_t *fun, int reg) |
|
uint32_t | pci_conf_read_32 (pci_fun_t *fun, int reg) |
|
uint8_t | pci_conf_read_8 (pci_fun_t *fun, int reg) |
|
static void | pci_conf_write (pci_fun_t *fun, int reg, uint8_t *buf, size_t len) |
|
void | pci_conf_write_16 (pci_fun_t *fun, int reg, uint16_t val) |
|
void | pci_conf_write_32 (pci_fun_t *fun, int reg, uint32_t val) |
|
void | pci_conf_write_8 (pci_fun_t *fun, int reg, uint8_t val) |
|
static int | pci_config_space_read_16 (ddf_fun_t *fun, uint32_t address, uint16_t *data) |
|
static int | pci_config_space_read_32 (ddf_fun_t *fun, uint32_t address, uint32_t *data) |
|
static int | pci_config_space_read_8 (ddf_fun_t *fun, uint32_t address, uint8_t *data) |
|
static int | pci_config_space_write_16 (ddf_fun_t *fun, uint32_t address, uint16_t data) |
|
static int | pci_config_space_write_32 (ddf_fun_t *fun, uint32_t address, uint32_t data) |
|
static int | pci_config_space_write_8 (ddf_fun_t *fun, uint32_t address, uint8_t data) |
|
void | pci_fun_create_match_ids (pci_fun_t *fun) |
|
char * | pci_fun_create_name (pci_fun_t *fun) |
|
void | pci_fun_delete (pci_fun_t *fun) |
|
void | pci_fun_init (pci_fun_t *fun, int bus, int dev, int fn) |
|
pci_fun_t * | pci_fun_new (pci_bus_t *bus) |
| int | pci_read_bar (pci_fun_t *fun, int addr) |
| | Read the base address register (BAR) of the device and if it contains valid address add it to the devices hw resource list.
|
| void | pci_read_bars (pci_fun_t *fun) |
| | Read the base address registers (BARs) of the function and add the addresses to its HW resource list.
|
|
void | pci_read_interrupt (pci_fun_t *fun) |
|
static bool | pciintel_enable_interrupt (ddf_fun_t *fnode) |
|
static hw_resource_list_t * | pciintel_get_resources (ddf_fun_t *fnode) |
|
static void | pciintel_init (void) |
Variables |
|
static pci_dev_iface_t | pci_dev_ops |
|
static driver_t | pci_driver |
| | PCI bus driver structure.
|
|
static ddf_dev_ops_t | pci_fun_ops |
|
static driver_ops_t | pci_ops |
| | PCI bus driver standard operations.
|
|
static hw_res_ops_t | pciintel_hw_res_ops |
